The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 17, 2017
Filed:
Jun. 16, 2016
Freescale Semiconductor Inc., Austin, TX (US);
Dubravka Bilic, Scottsdale, AZ (US);
Andrew C. McNeil, Chandler, AZ (US);
Lianjun Liu, Chandler, AZ (US);
Margaret Kniffin, Chandler, AZ (US);
Chad Dawson, Queen Creek, AZ (US);
Colin Stevens, Austin, TX (US);
NXP USA, Inc., Austin, TX (US);
Abstract
A structure for preventing charge induced leakage of a semiconductor device includes a shield separated from a first interconnect by at least a first lateral spacing and separated from a second interconnect by at least a second lateral spacing. The first interconnect is connected to a first junction and the second interconnect is connected to a second junction. A shield bias is connected to the shield to terminate an electromagnetic field on the shield. The shield between the first and second lateral spacings has a minimum width to substantially prevent formation of a conductive channel between the first and second junctions. The shield may be formed over a portion of the first junction and over a portion of the second junction to substantially prevent formation of another conductive channel between the first and second junctions at a location that does not have the first and second lateral spacings.