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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9787914 B1

PDFFull Text
Date of Patent:
Oct. 10, 2017

Filed:

Sep. 04, 2015

Stacked modular architecture high-resolution thermal chip camera

Applicant:

Bae Systems Information and Electronic Systems Integration Inc., Nashua, NH (US);

Inventors:

Louise C Sengupta, Ellicott City, MD (US);

Pierre-Alain S Auroux, Rockville, MD (US);

Evan A Binkerd, Merrimack, NH (US);

Richard J Blackwell, Jr., Dracut, MA (US);

Mihir D Boal, Nashua, NH (US);

Jeffrey F Bryant, Amherst, NH (US);

Don A Harris, Columbia, MD (US);

Donald D McManus, Bedford, NH (US);

Assignee:

BAE Systems Information and Electronic Systems Integration Inc., Nashua, NH (US);

Attorney:

Maine Cernota & Rardin

Primary Examiner:

David Porta

Assistant Examiner:

Gisselle Gutierrez

Int. Cl.
CPC ...
H04N 5/33 (2006.01); H01L 27/146 (2006.01); H01L 27/108 (2006.01); H01L 27/11517 (2017.01); H01L 27/11563 (2017.01); H04N 5/225 (2006.01);
U.S. Cl.
CPC ...
H04N 5/33 (2013.01); H01L 27/10805 (2013.01); H01L 27/11517 (2013.01); H01L 27/11563 (2013.01); H01L 27/1469 (2013.01); H01L 27/14618 (2013.01); H01L 27/14625 (2013.01); H01L 27/14632 (2013.01); H01L 27/14634 (2013.01); H01L 27/14636 (2013.01); H01L 27/14685 (2013.01); H01L 27/14687 (2013.01); H04N 5/2257 (2013.01);
Abstract

An uncooled high-resolution 12 micron pixel pitch 3D-stacked component thermal camera including an electronics board, a camera circuit card assembly (CCA) with an application-specific integrated circuit (ASIC), a synchronous dynamic random access memory (SDRAM), flash memory, a spacer, a wafer level packaged Focal Plane Array (FPA) wafer with a lens housing attach ring on the FPA, and a window.

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