The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2017

Filed:

Aug. 26, 2013
Applicant:

Netspeed Systems, San Jose, CA (US);

Inventors:

Sailesh Kumar, San Jose, CA (US);

Eric Norige, East Lansing, MI (US);

Joji Philip, San Jose, CA (US);

Joseph Rowlands, San Jose, CA (US);

Assignee:

NetSpeed Systems, San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 12/801 (2013.01); H04L 12/705 (2013.01); H04L 12/751 (2013.01);
U.S. Cl.
CPC ...
H04L 47/16 (2013.01); H04L 45/18 (2013.01); H04L 45/10 (2013.01);
Abstract

Systems and methods for automatically building a deadlock free inter-communication network in a multi-core system are described. The example implementations described herein involve automatically generating internal dependency specification of a system component based on dependencies between incoming/input and outgoing/output interface channels of the component. Dependencies between incoming and outgoing interface channels of the component can be determined by blocking one or more outgoing interface channels and evaluating impact of the blocked outgoing channels on the incoming interface channels. Another implementation described herein involves determining inter-component communication dependencies by measuring impact of a deadlock on the blocked incoming interface channels of one or more components to identify whether a dependency cycle is formed by blocked incoming interface channels.


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