The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 03, 2017
Filed:
Mar. 19, 2014
Applicant:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Inventors:
Yu-Lien Huang, Jhubei, TW;
Tsu-Hsiu Perng, Zhubei, TW;
Tung Ying Lee, Hsin-Chu, TW;
Ming-Huan Tsai, Zhubei, TW;
Clement Hsingjen Wann, Carmel, NY (US);
Assignee:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 21/762 (2006.01); H01L 29/10 (2006.01); H01L 29/165 (2006.01); H01L 29/267 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7851 (2013.01); H01L 21/76224 (2013.01); H01L 29/1054 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 29/7848 (2013.01); H01L 29/7853 (2013.01); H01L 29/165 (2013.01); H01L 29/267 (2013.01); H01L 29/66545 (2013.01);
Abstract
An embodiment fin field effect transistor (finFET) includes a fin extending upwards from a semiconductor substrate and a gate stack. The fin includes a channel region. The gate stack is disposed over and covers sidewalls of the channel region. The channel region includes at least two different semiconductor materials.