The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 03, 2017
Filed:
Sep. 10, 2015
Freescale Semiconductor Inc., Austin, TX (US);
Weng F. Yap, Chandler, AZ (US);
NXP USA, INC., Austin, TX (US);
Abstract
Methods for producing System-in-Packages (SiPs) containing embedded Surface Mount Device (SMD) modules are provided, as SiPs containing SMD modules. In one embodiment, the fabrication method includes positioning a semiconductor die and first preassembled SMD module, which contains a plurality of SMDs soldered to an interposer substrate, in predetermined spatial relationship. The preassembled SMD module and the semiconductor die are overmolded to yield a molded panel having a frontside at which the first preassembled SMD module and the semiconductor die are exposed. A Redistribution Layer (RDL) structure can be formed over the frontside of the molded panel containing interconnect lines electrically coupling the semiconductor die and the first preassembled SMD module. The molded panel may then undergo singulation to produce an SiP having a molded body in which the semiconductor die and the first preassembled SMD module are embedded.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile