The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2017

Filed:

Feb. 08, 2016
Applicant:

Amkor Technology, Inc., Tempe, AZ (US);

Inventors:

Do Hyung Kim, Gyeonggi-do, KR;

Jung Soo Park, Gyeonggi-do, KR;

Seung Chul Han, Gyeonggi-do, KR;

Assignee:

Amkor Technology, Inc., Tempe, AZ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/49 (2006.01); H01L 25/065 (2006.01); H01L 23/31 (2006.01); H01L 25/00 (2006.01); H01L 21/56 (2006.01); H01L 21/683 (2006.01); H01L 23/00 (2006.01); H01L 23/544 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 21/563 (2013.01); H01L 21/568 (2013.01); H01L 21/6835 (2013.01); H01L 23/3128 (2013.01); H01L 23/3135 (2013.01); H01L 23/3185 (2013.01); H01L 24/12 (2013.01); H01L 24/81 (2013.01); H01L 24/97 (2013.01); H01L 25/50 (2013.01); H01L 23/544 (2013.01); H01L 2221/68318 (2013.01); H01L 2221/68345 (2013.01); H01L 2221/68359 (2013.01); H01L 2221/68381 (2013.01); H01L 2223/54406 (2013.01); H01L 2223/54433 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81005 (2013.01); H01L 2224/83005 (2013.01); H01L 2224/97 (2013.01); H01L 2225/06524 (2013.01); H01L 2225/06548 (2013.01); H01L 2225/06586 (2013.01); H01L 2924/1531 (2013.01); H01L 2924/18161 (2013.01);
Abstract

A semiconductor package using a coreless signal distribution structure (CSDS) is disclosed and may include a CSDS comprising at least one dielectric layer, at least one conductive layer, a first surface, and a second surface opposite to the first surface. The semiconductor package may also include a first semiconductor die having a first bond pad on a first die surface, where the first semiconductor die is bonded to the first surface of the CSDS via the first bond pad, and a second semiconductor die having a second bond pad on a second die surface, where the second semiconductor die is bonded to the second surface of the CSDS via the second bond pad. The semiconductor package may further include a metal post electrically coupled to the first surface of the CSDS, and a first encapsulant material encapsulating side surfaces and a surface opposite the first die surface of the first semiconductor die, the metal post, and a portion of the first surface of the CSDS.


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