The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 19, 2017

Filed:

Feb. 26, 2016
Applicant:

Toshiba Memory Corporation, Tokyo, JP;

Inventors:

Sanad Bushnaq, Kanagawa, JP;

Masanobu Shirakawa, Kanagawa, JP;

Hidehiro Shiga, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/32 (2006.01); G11C 16/16 (2006.01); G11C 16/26 (2006.01); G11C 16/10 (2006.01);
U.S. Cl.
CPC ...
G11C 16/10 (2013.01); G11C 16/16 (2013.01); G11C 16/26 (2013.01); G11C 16/32 (2013.01);
Abstract

A non-volatile semiconductor memory device includes a first memory cell above a substrate and electrically connected to a first word line, a second memory cell above the first memory cell and electrically connected to a second word line, and a controller. The controller is configured to execute a write operation that includes a first step in which a first voltage is applied to a selected word line and to a non-selected word line, a second step after the first step in which a program voltage is applied to the selected word line, and a third step after the second step in which a second voltage higher than the first voltage is applied to the non-selected word line. A time period between a start of the second step and a start of the third step is different depending on whether the first or second memory cell is being written.


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