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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9761523 B1

PDFFull Text
Expired
Date of Patent:
Sep. 12, 2017

Filed:

Aug. 21, 2015

Interconnect structure with twin boundaries and method for forming the same

Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Jian-Hong Lin, Huwei Township, Yunlin County, TW;

Chwei-Ching Chiu, Hsinchu, TW;

Yung-Huei Lee, New Taipei, TW;

Chien-Neng Liao, Taichung, TW;

Yu-Lun Chueh, Hsinchu, TW;

Tsung-Cheng Chan, Nantou, TW;

Chun-Lung Huang, Minxiong Township, Chiayi County, TW;

Assignee:

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., , TW;

Attorney:

Hauptman Ham, LLP

Primary Examiner:

Caleb Henry

Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01); H01L 21/288 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 23/528 (2013.01); H01L 21/2885 (2013.01); H01L 21/76802 (2013.01); H01L 21/76831 (2013.01); H01L 21/76843 (2013.01); H01L 21/76879 (2013.01); H01L 23/53223 (2013.01); H01L 23/53238 (2013.01); H01L 23/53252 (2013.01); H01L 23/53266 (2013.01);
Abstract

A semiconductor device structure with twin-boundaries and method for forming the same are provided. The semiconductor device structure includes a substrate and a conductive structure formed over the substrate. The conductive structure includes twin boundaries, and a density of the twin boundaries is in a range from about 25 μmto about 250 μm.

Find Patent Forward Citations

Lin, Jian-Hong. (2017). Interconnect structure with twin boundaries and method for forming the same (U.S. Patent No. 9761523). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9761523

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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