The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 05, 2017

Filed:

May. 16, 2016
Applicant:

Adesto Technologies Corporation, Santa Clara, CA (US);

Inventor:

Ishai Naveh, San Jose, CA (US);

Assignee:

Adesto Technologies Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); H01L 45/00 (2006.01); G11C 14/00 (2006.01);
U.S. Cl.
CPC ...
H01L 45/085 (2013.01); G11C 14/009 (2013.01); G11C 14/0045 (2013.01);
Abstract

A method can include forming a plurality of access transistors, including forming second semiconductor regions over an integrated circuit substrate that are doped to a second conductivity type, the second semiconductor regions being over and in contact with first semiconductor regions doped to a first conductivity type, and forming third semiconductor regions doped to the first conductivity type in contact with the second semiconductor regions; forming a plurality of conductive structures, over and in contact with the third semiconductor regions; and forming programmable impedance memory cells over and in contact with the conductive structures.


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