The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 29, 2017

Filed:

Sep. 14, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Shaowu Huang, Steilacoom, WA (US);

Kai Xiao, University Place, WA (US);

Beom-Taek Lee, Mountain View, CA (US);

Boping Wu, King of Prussia, PA (US);

Xiaoning Ye, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01P 1/24 (2006.01); H01P 1/26 (2006.01); H01P 11/00 (2006.01); H01P 3/08 (2006.01); H01R 12/73 (2011.01); H01R 13/6461 (2011.01); H05K 1/02 (2006.01); H05K 1/18 (2006.01); H05K 3/22 (2006.01); H05K 3/40 (2006.01); G06F 1/16 (2006.01); H05K 1/09 (2006.01); H01P 5/16 (2006.01); H04L 25/03 (2006.01); H05K 3/30 (2006.01);
U.S. Cl.
CPC ...
H05K 1/023 (2013.01); G06F 1/16 (2013.01); H01P 1/268 (2013.01); H01P 3/08 (2013.01); H01P 5/16 (2013.01); H01P 11/003 (2013.01); H01R 12/737 (2013.01); H01R 13/6461 (2013.01); H04L 25/03006 (2013.01); H05K 1/0216 (2013.01); H05K 1/0231 (2013.01); H05K 1/0246 (2013.01); H05K 1/0268 (2013.01); H05K 1/09 (2013.01); H05K 1/181 (2013.01); H05K 3/22 (2013.01); H05K 3/4007 (2013.01); H05K 1/0243 (2013.01); H05K 3/303 (2013.01); H05K 2201/10159 (2013.01); H05K 2201/10204 (2013.01);
Abstract

Embodiments of the present disclosure are directed toward techniques and configurations for electrical signal absorption in an interconnect disposed in a printed circuit board (PCB) assembly. In one instance, a PCB assembly may comprise a substrate, and an interconnect formed in the substrate to route an electrical signal within the PCB. The interconnect may be coupled with a connecting component that is disposed on a surface of the PCB. An absorbing material may be disposed on the PCB to be in direct contact with at least a portion of the connecting component to at least partially absorb a portion of the electrical signal. Other embodiments may be described and/or claimed.


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