The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2017

Filed:

Aug. 29, 2016
Applicant:

Tokyo Electron Limited, Tokyo, JP;

Inventors:

Peng Chang, Miyagi, JP;

Kenji Matsumoto, Miyagi, JP;

Hiroyuki Nagai, Nirasaki, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76814 (2013.01); H01L 21/7684 (2013.01); H01L 21/76831 (2013.01); H01L 21/76832 (2013.01); H01L 21/76873 (2013.01); H01L 21/76879 (2013.01); H01L 23/5226 (2013.01); H01L 23/53228 (2013.01);
Abstract

A method of manufacturing a semiconductor device includes preparing a substrate having an interlayer insulating film and a hard mask provided on the interlayer insulating film and having a predetermined pattern, etching the interlayer insulating film to form a trench, forming a MnOfilm through an ALD method in a state where the hard mask is left on the interlayer insulating film, the MnOfilm being turned into a self-forming barrier film by reacting with the interlayer insulating film, performing a hydrogen radical processing on the MnOfilm, forming a Ru film through a CVD method, forming a Cu-based film through a PVD method or by forming a Cu seed through the PVD method, and then performing a Cu plating processing so as to embed the Cu-based film within the trench, and performing a CMP method to remove the hard mask and to form a Cu wiring.


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