The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 25, 2017
Filed:
Dec. 23, 2014
Intel Corporation, Santa Clara, CA (US);
Ramon Matas, Portland, OR (US);
Roger Gramunt, Portland, OH (US);
Chung-Lun Chan, Hillsboro, OR (US);
Benjamin C. Chaffin, Portland, OR (US);
Aditya Kesiraju, San Jose, CA (US);
Jonathan C. Hall, Hillsboro, OR (US);
Jesus Corbal, Hillsboro, OR (US);
INTEL CORPORATION, Santa Clara, CA (US);
Abstract
Exemplary aspects are directed toward resolving fault suppression in hardware, which at the same time does not incur a performance hit. For example, when multiple instructions are executing simultaneously, a mask can specify which elements need not be executed. If the mask is disabled, those elements do not need to be executed. A determination is then made as to whether a fault happens in one of the elements that have been disabled. If there is a fault in one of the elements that has been disabled, a state machine re-fetches the instructions in a special mode. More specifically, the state machine determines if the fault is on a disabled element, and if the fault is on a disabled element, then the state machine specifies that the fault should be ignored. If during the first execution there was no mask, if there is an error present during execution, then the element is re-run with the mask to see if the error is a 'real' fault.