The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 18, 2017

Filed:

Jun. 16, 2015
Applicant:

Asm Ip Holding B.v., Almere, NL;

Inventors:

Fu Tang, Gilbert, AZ (US);

Michael Eugene Givens, Phoenix, AZ (US);

Jacob Huffman Woodruff, Scottsdale, AZ (US);

Qi Xie, Leuven, BE;

Jan Willem Maes, Wilrijk, BE;

Assignee:

ASM IP Holding B.V., Almere, NL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76829 (2013.01); H01L 21/0228 (2013.01); H01L 21/02175 (2013.01); H01L 21/02186 (2013.01); H01L 21/02304 (2013.01); H01L 21/76895 (2013.01);
Abstract

In some aspects, methods of forming a metal chalcogenide thin film are provided. According to some methods, a metal chalcogenide thin film is deposited on a substrate in a reaction space in a cyclical deposition process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase chalcogen reactant. In some aspects, methods of forming three-dimensional structure on a substrate surface are provided. In some embodiments, the method includes forming a metal chalcogenide dielectric layer between a substrate and a conductive layer. In some embodiments the method includes forming an MIS-type contact structure including a metal chalcogenide dielectric layer.


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