The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 04, 2017

Filed:

Jul. 06, 2016
Applicant:

Stmicroelectronics International N.v., Amsterdam, NL;

Inventors:

Venkata Narayanan Srinivasan, Gautam Budh Nagar District, IN;

Srinivas Dhulipalla, Prakasam, IN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/22 (2006.01); H03K 5/19 (2006.01); H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
H03K 17/223 (2013.01); H03K 5/19 (2013.01); H03K 19/20 (2013.01);
Abstract

A power management circuit includes both a power on reset (POR) circuit and a voltage monitoring circuit. Explicit testing of these circuits is accomplished by controlling voltages applied to the circuits and monitoring an output signal responsive to a logical combination of outputs from the POR circuit and voltage monitoring circuit. The applied voltages are controlled with respect to timing of application, fixing of voltages and varying of voltages in a manner where a certain one of the circuits for explicit test is isolated with change in logic state of the output signal being indicative of operation of that isolated circuit.


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