The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 04, 2017

Filed:

Feb. 29, 2016
Applicant:

Microsemi Semiconductor Limited, Caldicot, Monmouthshire, GB;

Inventors:

Piers Tremlett, Coleford, GB;

Richard Birch, Caldicot, GB;

Assignee:

Microsemi Semiconductor Limited, Caldicot, Monmouthsh, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 25/065 (2006.01); H01L 25/00 (2006.01); H01L 21/56 (2006.01); H01L 25/10 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H05K 1/18 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0652 (2013.01); H01L 21/56 (2013.01); H01L 25/105 (2013.01); H01L 25/50 (2013.01); H01L 23/3121 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/45 (2013.01); H01L 24/48 (2013.01); H01L 24/83 (2013.01); H01L 24/85 (2013.01); H01L 2224/291 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/29191 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/32237 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/45124 (2013.01); H01L 2224/45139 (2013.01); H01L 2224/45144 (2013.01); H01L 2224/45147 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48105 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/48245 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/8385 (2013.01); H01L 2224/83447 (2013.01); H01L 2224/83851 (2013.01); H01L 2224/85447 (2013.01); H01L 2224/92247 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06548 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/14 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/186 (2013.01); H01L 2924/1811 (2013.01); H05K 1/186 (2013.01); H05K 2201/0141 (2013.01); H05K 2201/0154 (2013.01); H05K 2201/0195 (2013.01);
Abstract

An embedded integrated circuit package is made by providing a substrate with a patterned conductor layer defining bond pads. One or more components typically with upwardly facing contact pads are mounted on the substrate. The contact pads are wire bonded to the bond pads of the patterned conductor layer. A series of layers, each with one or more cut-outs corresponding to locations of the components forms a first solid stack containing cavities accommodating the components and associated wires. In one embodiment the layers are fiberglass layers and the layers are cured in the presence of a resin to form a solid body. In another embodiment the layers are thermoplastic layers.


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