The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 27, 2017

Filed:

Nov. 10, 2011
Applicants:

Teunis Van DE Peut, Leusden, NL;

Marco Jan-jaco Wieland, Delft, NL;

Inventors:

Teunis Van De Peut, Leusden, NL;

Marco Jan-Jaco Wieland, Delft, NL;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01J 37/302 (2006.01); H01J 37/04 (2006.01); H01J 37/317 (2006.01); H01J 37/30 (2006.01); B82Y 10/00 (2011.01); B82Y 40/00 (2011.01); G03F 7/20 (2006.01);
U.S. Cl.
CPC ...
H01J 37/3026 (2013.01); B82Y 10/00 (2013.01); B82Y 40/00 (2013.01); G03F 7/70475 (2013.01); H01J 37/045 (2013.01); H01J 37/3002 (2013.01); H01J 37/3174 (2013.01); H01J 37/3175 (2013.01); H01J 37/3177 (2013.01); H01J 2237/3175 (2013.01); H01J 2237/31761 (2013.01); H01J 2237/31764 (2013.01);
Abstract

A method for exposing a wafer using a plurality of charged particle beamlets. The method comprises identifying non-functional beamlets among the beamlets, allocating a first subset of the beamlets for exposing a first portion of the wafer, the first subset excluding the identified non-functional beamlets, performing a first scan for exposing the first portion of the wafer using the first subset of the beamlets, allocating a second subset of the beamlets for exposing a second portion of the wafer, the second subset also excluding the identified non-functional beamlets, and performing a second scan for exposing the second portion of the wafer using the second subset of the beamlets, wherein the first and second portions of the wafer do not overlap and together comprise the complete area of the wafer to be exposed.


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