The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 27, 2017
Filed:
Nov. 30, 2014
Applicants:
Yunwu Zhao, Tianjin, CN;
Hao Wang, Tianjin, CN;
Inventors:
Yunwu Zhao, Tianjin, CN;
Hao Wang, Tianjin, CN;
Assignee:
NXP USA, INC., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G01R 31/30 (2006.01); G01R 31/3177 (2006.01); G11C 29/26 (2006.01); G11C 29/50 (2006.01); G11C 11/41 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3177 (2013.01); G11C 29/26 (2013.01); G11C 29/50016 (2013.01); G11C 11/41 (2013.01);
Abstract
In an integrated circuit, a first scan chain of flip-flops is loaded with data for testing data retention of the flip-flops and a memory is loaded with data for performing a retention test by a memory built-in self-test (MBIST) wrapper circuit. A portion of the system is placed in a low-power state for a predetermined period of time before data is read from the memory and retention of data by the memory while in the low-power state is determined.
Zhao, Yunwu. (2017). Method and apparatus for testing memory (U.S. Patent No. 9689919). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9689919
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile