The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 20, 2017
Filed:
Jan. 22, 2014
Pac Tech—packaging Technologies Gmbh, Nauen, DE;
Ghassem Azdasht, Berlin, DE;
PAC TECH—PACKAGING TECHNOLOGIES GMBH, Nauen, DE;
Abstract
The invention relates to a chip arrangement () comprising a terminal substrate () and a plurality of semiconductor substrates () which are arranged on the terminal substrate, in particular chips, wherein terminal faces () arranged on a contact surface of the chips () are connected to terminal faces on a contact surface () of the terminal substrate (), wherein the chips () extend parallel with a lateral edge and transversally with their contact surface to the contact surface of the terminal substrate (), wherein vias () are arranged in the terminal substrate, which connect external contacts () arranged on an external contact side to terminal faces formed as internal contacts () on the contact surface of the terminal substrate, wherein terminal faces of the chips, which are arranged adjacent to the lateral edge, are connected to the internal contacts of the terminal substrate by way of a re-melted solder material deposit (). Furthermore, the invention relates to a method for producing a chip arrangement ().