The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2017

Filed:

Dec. 13, 2011
Applicants:

Jen Yu Chen, Hsinchu, TW;

Chien Chen Lee, Hsinchu County, TW;

Yi Wen Huang, Taipei, TW;

KE Jung Jen, Kaohsiung, TW;

Inventors:

Jen Yu Chen, Hsinchu, TW;

Chien Chen Lee, Hsinchu County, TW;

Yi Wen Huang, Taipei, TW;

Ke Jung Jen, Kaohsiung, TW;

Assignee:

STATS ChipPAC Pte. Ltd., Singapore, SG;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 21/66 (2006.01); H05K 1/02 (2006.01); H05K 3/34 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 22/12 (2013.01); H01L 24/14 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/01322 (2013.01); H01L 2924/12041 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/1306 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/181 (2013.01); H05K 1/0269 (2013.01); H05K 3/3436 (2013.01);
Abstract

A semiconductor device has a semiconductor die with composite bump structures over a surface of the semiconductor die. A conductive layer is formed over the substrate. The conductive layer has a channel in an interconnect site of the conductive layer. The channel extends beyond a footprint of the composite bump structures. The semiconductor die is disposed over the substrate. The bump material of the composite bump structures is melted. The composite bump structures are pressed over the interconnect site of the conductive layer so that the melted bump material flows into the channel. Electrical continuity between the composite bump structures and conductive layer is detected by a presence of the bump material in the channel. No electrical continuity between the composite bump structures and conductive layer is detected by an absence of the bump material in the channel. The electrical continuity can be detected by visual inspection or X-ray.


Find Patent Forward Citations

Chen, Jen. (2017). Semiconductor device and method of forming recesses in conductive layer to detect continuity for interconnect between semiconductor die and substrate (U.S. Patent No. 9685402). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9685402

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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