The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2017

Filed:

Aug. 03, 2016
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Yu-Hsiang Hung, Tainan, TW;

Ssu-I Fu, Kaohsiung, TW;

Chih-Kai Hsu, Tainan, TW;

Wei-Chi Cheng, Kaohsiung, TW;

Jyh-Shyang Jenq, Pingtung County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 21/8238 (2006.01); H01L 21/311 (2006.01); H01L 21/306 (2006.01); H01L 21/02 (2006.01); H01L 29/66 (2006.01); H01L 21/762 (2006.01); H01L 29/06 (2006.01); H01L 21/265 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823821 (2013.01); H01L 21/0217 (2013.01); H01L 21/02164 (2013.01); H01L 21/02636 (2013.01); H01L 21/26513 (2013.01); H01L 21/30604 (2013.01); H01L 21/31111 (2013.01); H01L 21/31144 (2013.01); H01L 21/76224 (2013.01); H01L 21/823828 (2013.01); H01L 21/823871 (2013.01); H01L 21/823878 (2013.01); H01L 29/0653 (2013.01); H01L 29/66795 (2013.01);
Abstract

The present invention provides a method for forming a semiconductor device, including the following steps: first, a substrate is provided, at least one gate is formed on the substrate, a contact etching stop layer (CESL) and a first dielectric layer are formed on the substrate in sequence, afterwards, a first etching process is performed to remove the first dielectric layer, and to expose a top surface and at least one sidewall of the etching stop layer, next, a second etching process is performed to partially remove the contact etching stop layer, and to form at least one epitaxial recess in the substrate. Afterwards, an epitaxial process is performed, to form an epitaxial layer in the epitaxial recess, and a contact structure is then formed on the epitaxial layer.


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