The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 20, 2017
Filed:
Jul. 14, 2016
Globalfoundries Inc., Grand Cayman, KY;
Ruilong Xie, Schenectady, NY (US);
Christopher Prindle, Poughkeepsie, NY (US);
Soon-Cheon Seo, Glenmont, NY (US);
Balasubramanian Pranatharthiharan, Watervliet, NY (US);
Pietro Montanini, Guilderland, NY (US);
Shogo Mochizuki, Clifton Park, NY (US);
GLOBALFOUNDRIES Inc., Grand Cayman, KY;
Abstract
Devices and methods of fabricating integrated circuit devices for forming epi for aggressive gate pitch are provided. One method includes: obtaining an intermediate semiconductor device having a substrate, a fin structure, a plurality of stacks; etching the spacer between the plurality of stacks; growing, epitaxially, undoped silicon on a top surface of the fin structure between the plurality of stacks; depositing a liner over the undoped silicon and the plurality of stacks; etching to remove the liner and narrow the spacers, wherein the etching forms a wider portion of the spacer at the base of the stacks; etching between the plurality of stacks to remove the undoped silicon and form recesses in the fin structure; and growing, epitaxially, doped silicon between the plurality of stacks and in the fin structure. Also disclosed is an intermediate device formed by the method.