The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2017

Filed:

Apr. 08, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Jaydeep P. Kulkarni, Portland, OR (US);

Anupama Thaploo, Maricopa, AZ (US);

Iqbal Rajwani, Roseville, CA (US);

Kyung-Hoae Koo, Hillsboro, OR (US);

Eric A. Karl, Portland, OR (US);

Muhammad Khellah, Tigard, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 7/12 (2006.01); G11C 7/22 (2006.01); G11C 17/16 (2006.01); G11C 7/10 (2006.01); G11C 11/419 (2006.01);
U.S. Cl.
CPC ...
G11C 7/12 (2013.01); G11C 7/1048 (2013.01); G11C 7/1069 (2013.01); G11C 7/22 (2013.01); G11C 11/419 (2013.01); G11C 17/16 (2013.01); G11C 2207/005 (2013.01);
Abstract

Embodiments include apparatuses, methods, and systems related to an assist circuit that may be coupled to one or more components of a memory system to selectively lower a supply voltage that is delivered to the component. For example, the assist circuit may be coupled to a plurality of bitcells (e.g., register file bitcells). The assist circuit may selectively lower the supply voltage delivered to the bitcells during at least a portion of a write operation and/or during an inactive state of the bitcells. Additionally, or alternatively, the assist circuit may be coupled to a read circuit to selectively lower the supply voltage delivered to the read circuit during an inactive state of the read circuit. The assist circuit may include a control transistor coupled in parallel with one or more diodes between a main supply rail and a supply node of the bitcells and/or read circuit.


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