The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 13, 2017

Filed:

Mar. 27, 2014
Applicant:

Shinko Electric Industries Co., Ltd., Nagano-ken, JP;

Inventors:

Satoshi Sunohara, Nagano, JP;

Keiji Yoshizawa, Nagano, JP;

Assignee:

Shinko Electric Industries Co., Ltd., Nagano-shi, Nagano-ken, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/00 (2006.01); H05K 1/11 (2006.01); H01L 23/498 (2006.01); H05K 3/46 (2006.01);
U.S. Cl.
CPC ...
H05K 1/115 (2013.01); H01L 23/49822 (2013.01); H01L 23/49827 (2013.01); H01L 23/49894 (2013.01); H05K 3/4673 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/15174 (2013.01); H05K 3/4602 (2013.01); H05K 2201/0195 (2013.01); H05K 2201/0209 (2013.01); H05K 2201/09627 (2013.01); H05K 2203/1476 (2013.01);
Abstract

A wiring substrate includes a first insulation layer, a first wiring layer formed on the first insulation layer, and a second insulation layer stacked on the first insulation layer. The second insulation layer covers the first insulation layer and includes a filler. A third insulation layer is stacked on the second insulation layer. The third insulation layer is filler-free. A through electrode extends through the second and third insulation layers in a thicknesswise direction. A second wiring layer is stacked on the third insulation layer and the through electrode. The through electrode electrically connects the second wiring layer to the first wiring layer.


Find Patent Forward Citations

Sunohara, Satoshi. (2017). Wiring substrate and semiconductor device (U.S. Patent No. 9681546). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9681546

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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