The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 13, 2017

Filed:

Apr. 20, 2016
Applicants:

Globalfoundries Inc., Grand Cayman, KY (US);

International Business Machines Corporation, Armonk, NY (US);

Stmicroelectronics, Inc., Coppell, TX (US);

Inventors:

Jody Fronheiser, Delmar, NY (US);

Murat Kerem Akarvardar, Saratoga Springs, NY (US);

Stephen Bedell, Yorktown Heights, NY (US);

Joel Kanyandekwe, Grenoble, FR;

Assignees:

GLOBALFOUNDRIES Inc., Grand Cayman, KY;

International Business Machines Corporation, Armonk, NY (US);

STMicroelectronics, Inc., Coppell, TX (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/775 (2006.01); H01L 29/165 (2006.01); H01L 21/02 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/165 (2013.01); H01L 21/02694 (2013.01); H01L 29/7849 (2013.01);
Abstract

A semiconductor structure can include a substrate and a substrate layer. The substrate can be formed of silicon and the substrate layer can be formed of silicon germanium. Above the substrate and under the substrate layer there can be provided a multilayer substructure. The multilayer substructure can include a first layer and a second layer. The first layer can be formed of a first material and the second layer can be formed of second material. A method can include forming a multilayer substructure on a substrate, annealing the multilayer substructure, and forming a substrate layer on the multilayer substructure.


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