The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 13, 2017

Filed:

Feb. 11, 2016
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Joyeeta Nag, Clifton Park, NY (US);

Shishir K. Ray, Clifton Park, NY (US);

Andrew H. Simon, Fishkill, NY (US);

Oleg Gluschenkov, Tannersville, NY (US);

Siddarth A. Krishnan, Newark, CA (US);

Michael P. Chudzik, Mountain View, CA (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76883 (2013.01); H01L 21/7684 (2013.01); H01L 21/7685 (2013.01); H01L 21/76802 (2013.01); H01L 21/76843 (2013.01); H01L 21/76849 (2013.01); H01L 21/76886 (2013.01); H01L 23/522 (2013.01);
Abstract

An aspect of the disclosure is directed to a method of forming an interconnect for use in an integrated circuit. The method comprises: forming an opening in a dielectric layer on a substrate; filling the opening with a metal such that an overburden outside of the opening is created; subjecting the metal to a microwave energy dose such that atoms from the overburden migrate to within the opening; and planarizing the metal to a top surface of the opening to remove the overburden, thereby forming the interconnect.


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