The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 13, 2017
Filed:
Jan. 07, 2016
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Inventors:
Yu-Ting Yen, Kaohsiung, TW;
Ying-Ho Chen, Taipei, TW;
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/3115 (2006.01); H01L 21/3215 (2006.01); H01L 21/02 (2006.01); H01L 21/321 (2006.01); H01L 21/3205 (2006.01); H01L 21/3105 (2006.01);
U.S. Cl.
CPC ...
H01L 21/3212 (2013.01); H01L 21/0214 (2013.01); H01L 21/31053 (2013.01); H01L 21/31155 (2013.01); H01L 21/3215 (2013.01); H01L 21/32055 (2013.01);
Abstract
A planarization method includes at least two steps. One of the steps is to implant at least one impurity into a wafer to form a polish stop layer in the wafer. The other one of the steps is to polish a top surface of the wafer until reaching the polish stop layer.