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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9673200 B1

PDFFull Text
Date of Patent:
Jun. 06, 2017

Filed:

Jan. 29, 2016

Semiconductor device structure and method of manufacturing the same

Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Shih-Chi Kuo, Yangmei, TW;

Tsung-Hsien Lee, Tainan, TW;

Ta-Ching Wei, Taichung, TW;

Assignee:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Attorney:

Birch, Stewart, Kolasch & Birch, LLP

Primary Examiner:

Julia Slutsker

Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 27/11 (2006.01); H01L 21/311 (2006.01); H01L 21/3205 (2006.01); H01L 21/027 (2006.01); H01L 21/768 (2006.01); H01L 21/762 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11 (2013.01); H01L 21/0271 (2013.01); H01L 21/0273 (2013.01); H01L 21/31111 (2013.01); H01L 21/31116 (2013.01); H01L 21/31144 (2013.01); H01L 21/32053 (2013.01); H01L 21/76224 (2013.01); H01L 21/76819 (2013.01); H01L 21/76837 (2013.01); H01L 21/823437 (2013.01); H01L 21/823481 (2013.01); H01L 27/1116 (2013.01);
Abstract

A method for forming a semiconductor device structure is provided. The method includes forming a first gate stack structure and a second gate stack structure on a substrate, and the first gate stack structure includes a first spacer adjacent to the second gate stack structure. The method also includes forming an U-shaped capping layer between the first gate stack structure and the second gate stack structure, and a lateral sidewall of the U-shaped capping layer is in direct contact with the first spacer of the first gate stack structure. A top of the lateral sidewall of the U-shaped capping layer is below a top of the first spacer of the first gate stack structure.

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