The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 30, 2017
Filed:
Apr. 15, 2015
Semicore Inc., Cheonan-si, Chungcheongnam-do, KR;
Nts Co., Ltd, Cheonan-si, Chungcheongnam-do, KR;
Amkor Technology Korea, Inc., Gwangju, KR;
Duk-Soon Choi, Cheonan-si, KR;
In-Seol Hwang, Cheonan-si, KR;
Woo-Yoel Jeong, Cheonan-si, KR;
Seong-Han Park, Cheonan-si, KR;
In-Seob Kwon, Incheon, KR;
Dong-Shin Kim, Incheon, KR;
SEMICORE INC., Cheonan-si, Chungcheongnam-Do, KR;
NTS CO., LTD, Cheonan-si, Chungcheongnam-Do, KR;
AMKOR TECHNOLOGY KOREA, INC., Gwangju, KR;
Abstract
A semiconductor chip testing apparatus is disclosed. The semiconductor chip testing apparatus includes: an upper socket unit which is formed therein with a receiving space receiving an upper semiconductor chip, holds a lower semiconductor chip using a suction airflow passing around the upper semiconductor chip in the receiving space, and electrically connects the lower semiconductor chip to the upper semiconductor chip; a blade block coupled to the upper socket unit to deliver a vacuum pressure for generating the suction airflow in the receiving space; and a lower socket unit on which the lower semiconductor chip held by the upper socket unit is seated, and which is electrically connected to the seated lower semiconductor chip.