The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 23, 2017

Filed:

Dec. 19, 2013
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsin-Chu, TW;

Inventors:

Chih-Liang Chen, Hsinchu, TW;

Jiann-Tyng Tzeng, Hsin Chu, TW;

Shu-Hui Sung, Hsinchu County, TW;

Charles Chew-Yuen Young, Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G01R 31/28 (2006.01); H01L 27/06 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5009 (2013.01); G01R 31/2874 (2013.01); G06F 17/5068 (2013.01); G06F 17/5081 (2013.01); G06F 2217/78 (2013.01); G06F 2217/80 (2013.01); H01L 27/0688 (2013.01);
Abstract

Among other things, one or more systems and techniques for analyzing a tiered semiconductor structure are provided. One or more segments are defined for the tiered semiconductor structure. The one or more segments are iteratively evaluated during electrical simulation while taking into account thermal properties to determine power metrics for the segments. The power metrics are used to determine temperatures generated by integrated circuitry within the segments. Responsive to a segment having a temperature above a temperature threshold, a temperature action plan, such as providing an alert or inserting one or more thermal release structures into the segment, is implemented. In this way, the one or more segments are iteratively evaluated to identify and resolve thermal and reliability issues.


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