The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 16, 2017
Filed:
Mar. 13, 2015
Freescale Semiconductor, Inc., Austin, TX (US);
Cheong Min Hong, Austin, TX (US);
Laureen H. Parker, Austin, TX (US);
NXP USA, INC., Austin, TX (US);
Abstract
A method of making a semiconductor device is described. The method comprises depositing a first polysilicon layer in a non-volatile memory (NVM) region and a logic region of a substrate. A first coating layer is deposited over the first polysilicon layer. The first coating layer and the first polysilicon layer are patterned to form a first gate in the NVM region. A memory cell is formed including the first gate. The first coating layer and the first layer of polysilicon in the logic region are removed and a logic gate polysilicon layer is deposited. The logic gate polysilicon layer is patterned to form a second gate in the logic region while the logic gate polysilicon layer is removed from the NVM region. Source/drain regions of the memory cell and the second gate are implanted concurrently.