The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 02, 2017

Filed:

Oct. 21, 2014
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Pranita Kerber, Mount Kisco, NY (US);

Carl J. Radens, LaGrangeville, NY (US);

Sudesh Saroop, Poughkeepsie, NY (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 21/84 (2006.01); H01L 21/02 (2006.01); H01L 21/311 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1207 (2013.01); H01L 21/02532 (2013.01); H01L 21/02598 (2013.01); H01L 21/31144 (2013.01); H01L 21/845 (2013.01); H01L 29/66795 (2013.01);
Abstract

Semiconductor fins are formed on a top surface of a substrate. A dielectric material is deposited on the top surfaces of the semiconductor fins and the substrate by an anisotropic deposition. A dielectric material layer on the top surface of the substrate is patterned so that the remaining portion of the dielectric material layer laterally surrounds each bottom portion of at least one semiconductor fin, while not contacting at least one second semiconductor fin. Dielectric material portions on the top surfaces of the semiconductor fins may be optionally removed. Each first semiconductor fin has a lesser channel height than the at least one second semiconductor fin. The first and second semiconductor fins can be employed to provide fin field effect transistors having different channel heights.


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