The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 25, 2017
Filed:
Feb. 01, 2016
Applicant:
Shinko Electric Industries Co., Ltd., Nagano-shi, JP;
Inventor:
Kei Murayama, Nagano, JP;
Assignee:
SHINKO ELECTRIC INDUSTRIES CO., LTD., Nagano-shi, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/34 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 24/16 (2013.01); H01L 23/3142 (2013.01); H01L 23/49822 (2013.01); H01L 23/49827 (2013.01); H01L 23/49838 (2013.01); H01L 2224/16227 (2013.01); H01L 2924/3841 (2013.01);
Abstract
A wiring substrate includes a connection pad formed in the outermost wiring layer, a dummy pad formed in the outermost wiring layer, and a dummy wiring portion formed in the outermost wiring layer, the dummy wiring portion connecting the connection pad and the dummy pad. The maximum width of each of the connection pad and the dummy pad is set to be larger than the width of the dummy wiring portion. A bump of an electronic component is flip-chip connected to a connection pad through a resin-containing solder.