The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 25, 2017

Filed:

Apr. 20, 2012
Applicants:

Ryan Chia-jen Chen, Chiaya, TW;

Yih-ann Lin, Jhudong Township, TW;

Chia Tai Lin, Taichung, TW;

Chao-cheng Chen, Hsin-Chu, TW;

Inventors:

Ryan Chia-Jen Chen, Chiaya, TW;

Yih-Ann Lin, Jhudong Township, TW;

Chia Tai Lin, Taichung, TW;

Chao-Cheng Chen, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 29/78 (2006.01); H01L 21/8234 (2006.01); H01L 29/66 (2006.01); H01L 27/088 (2006.01); H01L 21/762 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823431 (2013.01); H01L 21/76232 (2013.01); H01L 27/0886 (2013.01); H01L 29/6681 (2013.01);
Abstract

A device includes a semiconductor substrate, and a plurality of semiconductor fins parallel to each other, wherein the plurality of semiconductor fins is a portion of the semiconductor substrate. A Shallow Trench Isolation (STI) region is on a side of the plurality of semiconductor fins. The STI region has a top surface and a non-flat bottom surface, wherein the plurality of semiconductor fins is over the top surface of the STI region.


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