The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 18, 2017

Filed:

Oct. 26, 2016
Applicant:

Dspace Digital Signal Processing and Control Engineering Gmbh, Paderborn, DE;

Inventors:

Heiko Kalte, Paderborn, DE;

Dominik Lubeley, Verl, DE;

Lukas Funke, Paderborn, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); H03K 19/177 (2006.01); G11C 7/22 (2006.01);
U.S. Cl.
CPC ...
H03K 19/1776 (2013.01); G11C 7/10 (2013.01); G11C 7/222 (2013.01); H03K 19/17776 (2013.01);
Abstract

A method for accessing signals of a programmable logic device having a functional level and a configuration level at run time when the programmable logic device is executing a predefined configuration. An access to at least one signal value that has a number of bits is requested. The individual bits in the configuration are each located in an address unit with one address offset apiece such that one or more bits of a signal value are located in one address unit. A bitwise access to the requested signal values takes place, wherein the accesses to the individual bits are sorted as a function of the address unit containing the applicable bit in such a manner that the accesses to all bits located in an address unit take place in sequence as a function of the address offset, independently of the signal containing the applicable bit.


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