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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9627226 B1

PDFFull Text
Date of Patent:
Apr. 18, 2017

Filed:

Mar. 23, 2016

Fabrication method of semiconductor package

Applicant:

Siliconware Precision Industries Co., Ltd., Taichung, TW;

Inventors:

Chun-Tang Lin, Taichung, TW;

Yi-Che Lai, Taichung, TW;

Assignee:

Siliconware Precision Industries Co., Ltd., Taichung, TW;

Attorneys:

Mintz Levin Cohn Ferris Glovsky and Popeo, P.C.

Peter F. Corless

Steven M. Jensen

Primary Examiner:

William Harriston

Int. Cl.
CPC ...
H01L 25/00 (2006.01); H01L 21/52 (2006.01); H01L 21/56 (2006.01); H01L 21/78 (2006.01); H01L 25/065 (2006.01); H01L 21/48 (2006.01); H01L 23/498 (2006.01); H01L 23/48 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 21/52 (2013.01); H01L 21/486 (2013.01); H01L 21/563 (2013.01); H01L 21/78 (2013.01); H01L 23/3114 (2013.01); H01L 23/3128 (2013.01); H01L 23/49827 (2013.01); H01L 23/49833 (2013.01); H01L 25/065 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 23/3135 (2013.01); H01L 23/481 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2924/15174 (2013.01); H01L 2924/15311 (2013.01);
Abstract

A fabrication method of a semiconductor package is disclosed, which includes the steps of: disposing a plurality of first semiconductor elements on an interposer; forming a first encapsulant on the interposer for encapsulating the first semiconductor elements; disposing a plurality of second semiconductor elements on the first semiconductor elements; forming a second encapsulant on the first semiconductor elements and the first encapsulant for encapsulating the second semiconductor elements; and thinning the interposer, thereby reducing the overall stack thickness and preventing warpage of the interposer.

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