The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 2017

Filed:

May. 20, 2016
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsin-Chu, TW;

Inventors:

Jean-Pierre Colinge, Hsinchu, TW;

Chung-Cheng Wu, Ju-Bei, TW;

Sang Hoo Dhong, Hsinchu, TW;

Ta-Pen Guo, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/786 (2006.01); H01L 29/78 (2006.01); H01L 27/088 (2006.01); H01L 29/66 (2006.01); B82Y 10/00 (2011.01); B82Y 40/00 (2011.01); H01L 29/775 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H01L 21/82385 (2013.01); B82Y 10/00 (2013.01); B82Y 40/00 (2013.01); H01L 21/823456 (2013.01); H01L 21/823487 (2013.01); H01L 21/823807 (2013.01); H01L 21/823885 (2013.01); H01L 27/088 (2013.01); H01L 27/092 (2013.01); H01L 29/0676 (2013.01); H01L 29/42392 (2013.01); H01L 29/66439 (2013.01); H01L 29/66666 (2013.01); H01L 29/775 (2013.01); H01L 29/7827 (2013.01); H01L 29/78642 (2013.01); H01L 29/78696 (2013.01);
Abstract

A semiconductor arrangement includes a first semiconductor device including a first type region having a first conductivity type and a second type region having a second conductivity type. The semiconductor arrangement includes a second semiconductor device adjacent the first semiconductor device. The second semiconductor device includes a third type region having a third conductivity type and a fourth type region having a fourth conductivity type. The semiconductor arrangement includes a first insulator layer including a first insulator portion around at least some of the first semiconductor device and a second insulator portion around at least some of the second semiconductor device. The first insulator portion has a first insulator height, and the second insulator portion has a second insulator height. The first insulator height is different than the second insulator height. A method of forming a semiconductor arrangement is provided.


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