The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2017

Filed:

Oct. 21, 2015
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Wei-Hang Huang, Kaohsiung, TW;

Fu-Ting Sung, Yangmei, TW;

Chern-Yow Hsu, Chu-Bei, TW;

Shih-Chang Liu, Alian Township, TW;

Chia-Shiung Tsai, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/82 (2006.01); H01L 43/08 (2006.01); H01L 43/12 (2006.01); H01L 43/02 (2006.01);
U.S. Cl.
CPC ...
H01L 43/08 (2013.01); H01L 43/02 (2013.01); H01L 43/12 (2013.01);
Abstract

An integrated circuit device includes a substrate and a magnetic tunneling junction (MTJ). The MTJ includes at least a pinned layer, a barrier layer, and a free layer. The MTJ is formed over a surface of the substrate. Of the pinned layer, the barrier layer, and the free layer, the free layer is formed first and is closest to the surface. This enables a spacer to be formed over a perimeter region of the free layer prior to etching the free layer. Any damage to the free layer that results from etching or other free layer edge-defining process is kept at a distance from the tunneling junction by the spacer.


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