The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2017

Filed:

Oct. 15, 2014
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Jin Lu, Boise, ID (US);

Hongqi Li, Boise, ID (US);

Kevin Torek, Meridian, ID (US);

Thy Tran, Boise, ID (US);

Alex Schrinsky, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 21/768 (2006.01); H01L 21/308 (2006.01); H01L 21/311 (2006.01); H01L 21/321 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76898 (2013.01); H01L 21/76831 (2013.01); H01L 23/481 (2013.01); H01L 21/3081 (2013.01); H01L 21/31116 (2013.01); H01L 21/3212 (2013.01); H01L 2924/0002 (2013.01);
Abstract

Semiconductor device interconnect structures having low capacitance and associated systems and methods are disclosed herein. In one embodiment, a method of manufacturing an interconnect structure includes forming an opening in a surface of a semiconductor device and forming an interconnect structure at least within the opening. Forming the interconnect structure includes depositing a first insulator material on both the surface and a sidewall of the opening, selectively removing a first portion of the first insulator material on the surface over a second portion of the first insulator material on the sidewall, depositing a second insulator material on the second portion, and depositing a conductive material on the second insulator material. The method further includes selecting the thickness of the first and second insulators materials based on a threshold level of capacitance between the sidewall and the conductive material.


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