The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2017

Filed:

Sep. 06, 2016
Applicant:

Ememory Technology Inc., Hsin-Chu, TW;

Inventors:

Wei-Ren Chen, Pingtung County, TW;

Wen-Hao Lee, Hsinchu County, TW;

Assignee:

EMEMORY TECHNOLOGY INC., Hsin-Chu, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 5/06 (2006.01); G11C 17/16 (2006.01); G11C 17/18 (2006.01); H01L 27/112 (2006.01); H01L 29/423 (2006.01); H01L 29/78 (2006.01); H01L 27/11529 (2017.01); H01L 27/11573 (2017.01); H01L 29/51 (2006.01); H01L 23/525 (2006.01); G11C 16/10 (2006.01); G11C 16/14 (2006.01); G11C 16/26 (2006.01); H01L 23/528 (2006.01); H01L 27/11524 (2017.01); H01L 29/49 (2006.01); H01L 27/11558 (2017.01); H01L 27/11526 (2017.01); H01L 29/93 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
G11C 5/06 (2013.01); G11C 16/0408 (2013.01); G11C 16/0425 (2013.01); G11C 16/0433 (2013.01); G11C 16/10 (2013.01); G11C 16/14 (2013.01); G11C 16/26 (2013.01); G11C 17/16 (2013.01); G11C 17/18 (2013.01); H01L 23/528 (2013.01); H01L 23/5252 (2013.01); H01L 27/11206 (2013.01); H01L 27/11524 (2013.01); H01L 27/11526 (2013.01); H01L 27/11529 (2013.01); H01L 27/11558 (2013.01); H01L 27/11573 (2013.01); H01L 29/42328 (2013.01); H01L 29/42368 (2013.01); H01L 29/4916 (2013.01); H01L 29/512 (2013.01); H01L 29/7817 (2013.01); H01L 29/7835 (2013.01); H01L 29/0649 (2013.01); H01L 29/93 (2013.01); H01L 2924/0002 (2013.01);
Abstract

An array structure of a single-poly nonvolatile memory includes a first MTP section, a first OTP section and a ROM section. The first MTP section includes a plurality of MTP cells, the first OTP section includes a plurality of OTP cells and the first ROM section includes a plurality of ROM cells. The first MTP is connected to a first word line, a first source line, a first erase line and a plurality of bit lines. The first OTP section is connected to a second word line, a second source line and the plurality of bit lines shared with the first MTP section. The first ROM section is connected to a third word line, a third source line and the plurality of bit lines shared with the first MTP section.


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