The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 04, 2017
Filed:
Apr. 06, 2015
Taiwan Semiconductor Manufacturing Company Limited, Hsin-Chu, TW;
William Wu Shen, Hsinchu, TW;
Yun-Han Lee, Baoshan Township, TW;
Chin-Chou Liu, Jhubei, TW;
Hsien-Hsin Lee, Duluth, GA (US);
Chung-Sheng Yuan, Hsinchu, TW;
Chao-Yang Yeh, Luzhou, TW;
Wei-Cheng Wu, Hsinchu, TW;
Ching-Fang Chen, Taichung, TW;
Taiwan Semiconductor Manufacturing Company Limited, Hsin-Chu, TW;
Abstract
One or more techniques or systems for incorporating a common template into a system on chip (SOC) design are provided herein. For example, a common template mask set is generated based on a first set of polygon positions from a first vendor and a second set of polygon positions from a second vendor. A third party creates a third party SOC design using a set of design rules generated based on the common template mask set. The common template is fabricated based on the third party SOC design using the common template mask set. Because the common template is formed using the common template mask set and because the common template mask set is based on polygon positions from both the first vendor and the second vendor, a part can be connected to the SOC regardless of whether the part is sourced from the first vendor or the second vendor.