Performing memory data scrubbing operations in processor-based memory in response to periodic memory controller wake-up periods

Abstract

Aspects of the disclosure involve memory data scrubber circuits configured to perform memory data scrubbing operations in a processor-based memory to provide data error correction in response to periodic memory controller wake-up periods. Memory data scrubbing is performed to correct errors in data words stored in memory. Memory data scrubbing is initiated in the memory to conserve power in response to periodic memory controller wake-up periods during processor idle periods. Further, in certain aspects disclosed herein, the memory data scrubber circuit is provided as a separate system outside of the memory controller in the memory system. In this manner, power consumption can be further reduced, because the memory data scrubber circuit can continue with memory data scrubbing operations in the memory independent of the memory controller operation, and after the memory controller access commands issued during the wake-up period are completed and the memory controller is powered-down.