The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 28, 2017

Filed:

Dec. 14, 2015
Applicant:

Via Alliance Semiconductor Co., Ltd., Shanghai, CN;

Inventors:

Qiang Si, Beijing, CN;

Fan Jiang, Beijing, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/08 (2006.01); H03L 7/085 (2006.01); H03K 5/134 (2014.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03L 7/085 (2013.01); H03K 5/134 (2014.07); H03K 2005/00019 (2013.01);
Abstract

A delay lock loop is provided. A delay unit delays a first clock signal to generate a second clock signal according to the delay factor. An elimination unit delays a third clock signal to generate a fourth clock signal. A phase detection unit generates an indication signal according to a phase difference between the second and fourth clock signals. When a duration of the indication signal being at a first level does not arrive at a pre-determined value and the indication signal is at a second level, the control unit increases the delay factor. When the duration of the indication signal being at the first level arrives at the pre-determined value and the indication signal is at the second level, the control unit reduces the delay factor.


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