The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 28, 2017

Filed:

Oct. 12, 2015
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Hsiang-Tai Lu, Zhubei, TW;

Chih-Hsien Lin, Taichung, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/115 (2006.01); H01L 21/3205 (2006.01); G11C 29/04 (2006.01); H01L 21/28 (2006.01); G11C 16/02 (2006.01); G11C 16/04 (2006.01); G11C 16/22 (2006.01); H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11521 (2013.01); G11C 16/02 (2013.01); G11C 16/0416 (2013.01); G11C 16/225 (2013.01); G11C 29/04 (2013.01); H01L 21/28273 (2013.01); H01L 21/3205 (2013.01); H01L 22/14 (2013.01); H01L 27/11558 (2013.01); G11C 2029/0403 (2013.01);
Abstract

A method of forming a semiconductor memory storage device that includes forming first and second doped regions of a first type in a semiconductor substrate and laterally spaced from one another, forming a gate dielectric extends over the semiconductor substrate between the first and second doped regions, forming a floating gate on the gate dielectric, and forming an ultraviolet (UV) light blocking material vertically disposed above the floating gate such that the floating gate remains electrically charged after the semiconductor memory storage device is exposed to UV light.


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