The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 28, 2017
Filed:
Nov. 19, 2015
Globalfoundries Inc., Grand Cayman, KY;
Benjamin V. Fasano, New Windsor, NY (US);
Michael S. Cranmer, Poughkeepsie, NY (US);
Richard F. Indyk, Wappingers Falls, NY (US);
Harry Cox, Rifton, NY (US);
Katsuyuki Sakuma, Fishkill, NY (US);
Eric D. Perfecto, Poughkeepsie, NY (US);
GLOBALFOUNDRIES INC., Grand Cayman, KY;
Abstract
A method of interconnecting first and second semiconductor dies is provided. A splice interposer is attached to a top surface of a substrate through first pillars formed on a bottom surface of the splice interposer. The first semiconductor die is attached to the top surface of a substrate through second pillars formed on a bottom surface of the first semiconductor die. The first semiconductor die is attached to a top surface of the splice interposer through third pillars formed on the bottom surface of the first semiconductor. The second semiconductor die is attached to the top surface of the splice interposer through fourth pillars formed on a bottom surface of the second semiconductor die. The first to fourth plurality of pillars and the splice interposer form interconnection and wiring between the first semiconductor die, the second semiconductor die and the substrate.