The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 28, 2017
Filed:
Apr. 23, 2014
Applicant:
Siliconware Precision Industries Co., Ltd., Taichung, TW;
Inventors:
Wen-Tsung Tseng, Taichung, TW;
Yi-Che Lai, Taichung, TW;
Shih-Kuang Chiu, Taichung, TW;
Mao-Hua Yeh, Taichung, TW;
Assignee:
Siliconware Precision Industries Co., Ltd., Taichung, TW;
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/498 (2006.01); H01L 23/14 (2006.01); H01L 23/15 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49827 (2013.01); H01L 23/147 (2013.01); H01L 23/15 (2013.01); H01L 23/49822 (2013.01); H01L 23/49838 (2013.01); H01L 23/49894 (2013.01); H01L 2224/11 (2013.01);
Abstract
A semiconductor package is provided, including a semiconductor substrate having a plurality of conductive vias, a buffer layer formed on the semiconductor substrate, a plurality of conductive pads formed on end surfaces of the conductive vias and covering the buffer layer. During a reflow process, the buffer layer greatly reduces the thermal stress, thereby eliminating the occurance of cracking at the interface of conductive pads. A method of fabricating such a semiconductor package is also provided.