The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 21, 2017

Filed:

May. 26, 2015
Applicant:

Ibiden Co., Ltd., Ogaki-shi, JP;

Inventors:

Toshiki Furutani, Ogaki, JP;

Yuki Yoshikawa, Ogaki, JP;

Assignee:

IBIDEN CO., LTD., Ogaki-shi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 7/00 (2006.01); H01L 23/498 (2006.01); H01L 21/48 (2006.01); H05K 1/02 (2006.01); H01L 23/00 (2006.01); H05K 3/46 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49822 (2013.01); H01L 21/48 (2013.01); H01L 21/4857 (2013.01); H01L 23/498 (2013.01); H01L 23/49811 (2013.01); H01L 23/49827 (2013.01); H01L 23/49894 (2013.01); H05K 1/0271 (2013.01); H01L 24/16 (2013.01); H01L 24/48 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/181 (2013.01); H05K 3/4682 (2013.01); H05K 2201/0191 (2013.01); H05K 2201/0209 (2013.01);
Abstract

A printed wiring board includes a first interlayer, a first conductive layer on first-surface side of the first interlayer, a second conductive layer on second-surface side of the first interlayer, a first buildup layer including interlayers and conductive layers and formed on first surface of the first interlayer, and a second buildup layer including interlayers and conductive layers and formed on second surface of the first interlayer. The first conductive layer is formed such that the first conductive layer is embedded in the first interlayer and exposing surface on the first surface of the first interlayer, the second conductive layer is formed on the second surface of the first interlayer, and the interlayers in the first buildup layer include a second interlayer positioned adjacent to the first conductive layer and having the greatest thickness among the first interlayer and interlayers in the first and second buildup layers.


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