The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 14, 2017

Filed:

Feb. 17, 2016
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Tsung-Yao Wen, Hsinchu, TW;

Jui-Yao Lai, Yuanlin Township, TW;

Yao-De Chiou, Taoyuan, TW;

Sai-Hooi Yeong, Zhubei, TW;

Yen-Ming Chen, Chu-Pei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 27/08 (2006.01); H01L 21/265 (2006.01); H01L 21/8238 (2006.01); H01L 21/8234 (2006.01); H01L 29/66 (2006.01); H01L 21/84 (2006.01); H01L 27/092 (2006.01); H01L 27/12 (2006.01); H01L 29/10 (2006.01); H01L 21/324 (2006.01); H01L 29/04 (2006.01); H01L 29/06 (2006.01); H01L 29/161 (2006.01); H01L 27/088 (2006.01);
U.S. Cl.
CPC ...
H01L 21/26513 (2013.01); H01L 21/324 (2013.01); H01L 21/823431 (2013.01); H01L 21/823807 (2013.01); H01L 21/823821 (2013.01); H01L 21/845 (2013.01); H01L 27/0924 (2013.01); H01L 27/1211 (2013.01); H01L 29/045 (2013.01); H01L 29/0653 (2013.01); H01L 29/1033 (2013.01); H01L 29/1054 (2013.01); H01L 29/1083 (2013.01); H01L 29/161 (2013.01); H01L 29/6656 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01); H01L 27/0886 (2013.01); H01L 29/785 (2013.01);
Abstract

A method for manufacturing a semiconductor structure is provided. The method includes implanting a first type of dopants in a first region and a second region of a substrate and implanting a second type of dopants in the second region of the substrate. The method includes forming a material layer over the first region and the second region of the substrate and patterning the material layer, the first region of the substrate, and the second region of the substrate to form a first fin structure and a second fin structure The method includes forming a gate structure across the first fin structure and the second fin structure.


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