The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 07, 2017

Filed:

Jul. 22, 2014
Applicant:

Lam Research Corporation, Fremont, CA (US);

Inventors:

Monica Titus, Sunnyvale, CA (US);

Gowri Kamarthy, Pleasanton, CA (US);

Harmeet Singh, Fremont, CA (US);

Yoshie Kimura, Castro Valley, CA (US);

Meihua Shen, Fremont, CA (US);

Baosuo Zhou, Redwood City, CA (US);

Yifeng Zhou, Fremont, CA (US);

John Hoang, Fremont, CA (US);

Assignee:

LAM RESEARCH CORPORATION, Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/3065 (2006.01); H01L 21/66 (2006.01); H01L 21/67 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 22/12 (2013.01); H01L 21/3065 (2013.01); H01L 21/31116 (2013.01); H01L 21/67103 (2013.01); H01L 22/20 (2013.01);
Abstract

A method of planarizing an upper surface of a semiconductor substrate in a plasma etch chamber comprises supporting the substrate on a support surface of a substrate support assembly that includes an array of independently controlled thermal control elements therein which are operable to control the spatial and temporal temperature of the support surface of the substrate support assembly to form independently controllable heater zones which are formed to correspond to a desired temperature profile across the upper surface of the semiconductor substrate. The etch rate across the upper surface of the semiconductor substrate during plasma etching depends on a localized temperature thereof wherein the desired temperature profile is determined such that the upper surface of the semiconductor substrate is planarized within a predetermined time. The substrate is plasma etched for the predetermined time thereby planarizing the upper surface of the substrate.


Find Patent Forward Citations

Loading…