The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 21, 2017

Filed:

Jun. 25, 2014
Applicant:

Elite Semiconductor Memory Technology Inc., Hsinchu, TW;

Inventors:

Jen-Shou Hsu, Hsinchu, TW;

Po-Hsun Wu, Kaohsiung, TW;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/3177 (2006.01); G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2863 (2013.01); G01R 31/2868 (2013.01); G01R 31/2889 (2013.01);
Abstract

An aspect of the present invention is to provide a test system for detecting whether a continuity fault condition, e.g., a short or open condition, exists in the path between a tester and chips on a wafer during a wafer level burn-in testing. According to one embodiment of the present invention, the test system comprises a probe card and n chips. The probe card comprises m first signal contacts for receiving m test signals from the tester, n second signal contacts for providing n test results to the tester, and a contact array. The probe card is in contact with the chips on the wafer through a plurality of needles. In this manner, the test system can detect whether the continuity fault condition exists in the path between the tester and the chips on the wafer during the wafer level burn-in testing.


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