The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9570564 B1

PDF
Full Text
Expired
Date of Patent:
Feb. 14, 2017

Filed:

Aug. 05, 2014
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Deborah A. Alperstein, Essex Junction, VT (US);

David L. Harame, Essex Junction, VT (US);

Alvin J. Joseph, Williston, VT (US);

Qizhi Liu, Lexington, MA (US);

Keith J. Machia, Swanton, VT (US);

Christa R. Willets, Jericho, VT (US);

Assignee:

GLOBALFOUNDRIES Inc., Grand Cayman, KY;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/417 (2006.01); H01L 29/732 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 29/423 (2006.01); H01L 29/737 (2006.01);
U.S. Cl.
CPC ...
H01L 29/41708 (2013.01); H01L 29/0821 (2013.01); H01L 29/0826 (2013.01); H01L 29/1004 (2013.01); H01L 29/66272 (2013.01); H01L 29/732 (2013.01); H01L 29/42304 (2013.01); H01L 29/66242 (2013.01); H01L 29/7371 (2013.01);
Abstract

Device structures and fabrication methods for a bipolar junction transistor. A first semiconductor layer is formed on a substrate containing a first terminal. An etch stop layer is formed on the first semiconductor layer, and a second semiconductor layer is formed on the etch stop layer. The second semiconductor layer is etched to define a second terminal at a location of an etch mask on the second semiconductor layer. A first material comprising the etch stop layer and a second material comprising the second semiconductor layer are selected such that the second material of the second semiconductor layer etches at a greater etch rate than the first material of the etch stop layer. The first semiconductor layer may be a base layer that is used to form an intrinsic base and an extrinsic base of the bipolar junction transistor.


Find Patent Forward Citations

Alperstein, Deborah. (2017). Self-aligned emitter-base bipolar junction transistor with reduced base resistance and base-collector capacitance (U.S. Patent No. 9570564). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9570564

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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